Yield Oriented Design Platform


NanoYield is a yield oriented design platform for analysis and optimization of circuit yield in memory, digital and analog circuits. Based on Primarius1 unique technology of statistical modeling and high-sigma analysis algorithms, NanoYield performs circuit statistical simulation with non-destructive precision, as well as acceleration through efficient algorithms and parallelization.
NanoYield improves designer productivity with the user-friendly GUI-based DFY (design for yield) environment called NDE (Nano Design Environment). Based on the design goals, NDE allows users to run variation analysis, predict yield, access the effectiveness of yield and circuit optimization efforts, and improve product competitiveness.


Key Advantage

Full integration:Built-in SPICE engine and high efficient statistical algorithms 

Superior performance:PVT/fast Monte Carlo/advanced High Sigma 

Scalable parallelization:Near-linear scaling on both private farm or public clouds 

Validated accuracy:Silicon validation in 28nm,14nm,7nm 

Simplified licensing:Most economic parallelization licensing model


High sigma yield analysis for memory and standard cell designs

Yiled prediction and optimization for analog and digital block designs

Foundries/IDMs technology development for SRAM yield improvement


  • Supports Hspice and Spectre netlist formats
  • Full SPICE analysis features
  • Full SPICE model supports
  • Full PVT and fast PVT analysis
  • Monte Carlo analysis
  • High sigma analysis (4-7σ+): 100K+ variables
  • System high sigma analysis for full chip yield analysis
  • Rich yield prediction and statistical circuit analysis functions, e.g., sensitivity analysis, parameter sweeping
  • Powerful GUI-based circuit analysis features through NDE
  •  Application Example